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Sabbatical Report: Teaching a compressed class in Germany

Sabbatical Report: Teaching a compressed class in Germany

High speed train from Karlsruhe to Strasbourg

High speed train from Karlsruhe to Strasbourg

While I was on sabbatical from York University I had the opportunity to teach twice at the University of Applied Sciences in Karlsruhe, Germany (Hochschule Karlsruhe, a.k.a HsKa).  I had been invited to do so by Professor Klemens Gintner, a colleague and friend who I had hosted during his sabbatical in Toronto in 2015. It was Prof. Gintner who had arranged contact with INSA Strasbourg after my wife had expressed her interest in spending our sabbatical year in a French-speaking country.  During the sabbatical we lived in Strasbourg, France and my commute by high speed train to Karlsruhe in Germany was similar to my daily non-sabbatical commute to York University: about 1hr30 each way, door-to-door.  It was like taking a 230 km/h GO train.

The Applied Sciences University has a primarily teaching focus, unlike KIT, the research-intensive university in Karlsruhe. It's similar to Canadian polytechnic schools like today's BCIT or Ryerson prior to 2000. The course in Karlsruhe was offered in English as part of their International Program.  My students in both the Fall and Spring sessions were from a variety of countries: Germany, Mexico, Brazil, Singapore, and elsewhere.

classroom in Karlsruhe

Microcontroller class in Karlsruhe's HsKa

I taught IP 411 "Embedded Systems for Engineering Applications” class in Karlsruhe twice:

  1. Fall 2018 (4 days in October)
    • A more complex microcontroller (NXP KL25Z)
    • Two weekends (2pm - 5:30 on Friday;  9am - 5:30 on Saturday)
  2. Spring 2019 (6 days in April & May)
    • A simpler microcontroller (NXP LPC802)
    • Three weekends (2pm - 5:30pm on Friday; 10am - 3pm on Saturday)
    • a 3 week gap between the 2nd and 3rd weekend

The class took place in a standard classroom (Building M, Room 303) with movable desks, a projector and high-end, engineering-style chalk board.

Information flow on microcontrollers

An analogy for information flow on microcontrollers

While the topics in both versions of the class were the same (little computer chips that control things like the AC in your house or cruise control in your car) I took two different approaches to teaching the class based on feedback from students and my own personal observations.

Both classes were taught in "compressed" fashion: ~24 hours total, broken up into four or six days of class time.  While we had about the same amount of contact time in both classes, the less intensive version, with a gap for reflection and project development was, in my opinion, a better way to do it.  I found the students, primarily in their early to mid-twenties and in the later stages of their degrees handled the intensive nature of the classes well.

While the compressed format of the class did not lend itself well to the flipped classes I usually do in 12 week classes, I did conduct two-stage tests.  A two-stage test is designed so that the first stage is  open-book, open-device, open-team, open-discussion format -- it's a mid-learning, formative assessment.  The second stage, similar in style and content to the first, is more traditional: open-book, no devices, individual, silent -- it's a final, after-learning, summative assessment.  This was a bit of a surprise to the students, who were used to the 100% final exam assessment commonly found at German universities.

The IP411 course was similar to the EECS 3215 class on embedded systems that I teach at York University and the BME 538 course that I used to teach at Ryerson.

Most of the IP411 students were ambivalent about microcontroller architecture, much like my old biomedical students in BME 538.  The exceptions were the German automotive engineering students who would have preferred a model similar to the ones they had previously used (8051).  This is in contrast to electrical, computer or software engineering students that I've taught in North America who currently usually favour ARM.

That said, most of the students in the Fall edition of the class felt overwhelmed by the material, due in part to the dense nature of the schedule, as well as the complexity of the KL25Z chip.  The chip has too many pins and too many features, making it a poor choice as an introductory chip.  By switching to the NXP LPC802, the smallest ARM chip with the smallest feature set that didn't require exotic tools to build with in the 2018/19 timeframe, and by extending the course to six days as opposed to four, I think that the students were better able to learn the material.

This board, the LPC 802 (p/n OM40000), is available from, Farnell and Mouser Germany, as well as a number of North American distributors. The board costs about 15 Euros ($25 Can) and includes a USB cable and a built-in professional debugger. Each student purchased the board before the class and was expected to come to class with their own laptop or tablet, ready to program it.

Please purchase the OM40000 board before class!

Students need to purchase the board before class. Please purchase from Digikey, Arrow, Farnell or any other vendor you wish. The part number is OM40000.

The class was run like a technical workshop, with slide-based "lectures", mixed with discussion and hands-on, in-class labs:


In addition to discussions and lab activities during class, each student was responsible for creating a project with the board in the time between the 2nd and 3rd weekends of the class, before the final test.  The students were given much flexibility in what they could do for the project.  For students who did not have a lot of experience or who were intimidated by the material, the scope of their project was limited to the existing hardware on the development board.  For more experienced, resourceful or enthusiastic students, the project they chose could either use custom hardware or they could work with  MikroE "Click" peripheralboards.  Here is an example of me using a "Click" board with the LPC802 and other microcontrollers:

Project plan with contingency map

Project plan with contingency

To maximize the possibility of project success, each student was required to develop a contingency map.  The map illustrated the possible pathways of development in the event that they ran into a critical roadblock.  As in real life, not completely achieving a project's main goal does not mean absolute failure.  There are often alternate avenues for success, even if the success is attenuated.  These maps provide pathways that show maximum possible project grades if the student chooses or is forced to follow an alternative development pathway.  By thinking about the possibility of failure ahead of time and by laying out possible solutions the IP411 students were empowered to make project development decisions.

Overall, I was really happy with the teaching experience and believe that the students got a lot out of the course, both those with moderate technical background and those with limited background.  I am planning on modifying the LPC802 material for use in York's  EECS 3215, as well as in the book that I am currently co-authoring.  The experience teaching a compressed class has also got me thinking of doing something similar at York University during the Spring/Summer semester.




James Andrew Smith is an associate professor in Electrical Engineering and Computer Science Department in York University's Lassonde School.  He lived in Strasbourg, France and taught at the INSA Strasbourg and Hochschule Karlsruhe while on sabbatical in 2018-19 with his wife and kids.  This blog post is part of a series discussing the family's sabbatical year, from both personal and professional perspectives.  You can view my Twitter postings from about Strasbourg (INSA) and HsKa (Karlsruhe).